Armaan Gomes, I Think, Maybe
AGI-EXPERIENCEREV A

Experience

Education

Massachusetts Institute of TechnologyCambridge, MA — May 2029
B.S.E. Electrical Engineering with Computing · Minor in Materials Science/Engineering · GPA 5.0/5.0
  • Courses: Algorithms, Computer System Architecture, Embedded Systems
Homestead High SchoolCupertino, CA — June 2025
GPA 4.0/4.0
  • President: Programming Club, Cybersecurity Club
  • Science Bowl · Robotics Software Lead

Research & Work

MIT Low Energy Autonomous Navigation Group — Student ResearcherMay 2026–Present
  • Designing a hardware design verification pipeline for robotics platforms with real-time deployment of high-efficiency SOCs and AI vision accelerators.
  • Studying efficient ASIC placement to minimize energy use while maximizing throughput.
MIT Ferroelectric Materials & Devices Group — Student ResearcherAug 2025–May 2026
  • Improving on-chip energy storage using ferroelectric material effects.
  • Tested wafers, analyzed, and optimized novel capacitors for energy and power density.
  • Evaluated plate and in-plane capacitor polarization, power, and breakdown properties.
UC Berkeley Nanotechnology Lab — Student ResearcherJun 2024–Aug 2025
  • Built low-cost 18-channel microfluidics potentiostat hardware.
  • Optimized Teensy-based potentiostat and ECG core for high data throughput.
  • Created FPGA firmware and C# driver for a 256-channel electrochemical camera.
BWSI: BASICs of ASICs, MIT Lincoln Labs — StudentJun 2024–Jul 2024
  • Learned ASIC fabrication, design, Verilog verification and simulation.
  • Led team of 6 to design and tape out SuperMic, an 8-channel beamforming ASIC.
  • Designed and fabricated 7 additional accelerator, beamforming, and specialized ASICs.

Activities

MIT Open Compute LaboratoryAug 2025–Present
  • Developed custom accelerators for DNNs; demonstrated PDM, Ternary, and INT8 inference.
  • Built a custom RV32-IM CPU with pipelined design; compiled and ran Pong over VGA.
  • Designing a custom FPGA server cluster with 100 Gb/s+ inter-FPGA bandwidth and >1.6M logic slices.
MIT Satellite TeamMar 2026–Present
  • Designing custom power electronics for the LEONIRD High Altitude Balloon.
  • Launched high altitude balloon and collected data at over 30,000 feet.
MIT MotorsportsAug 2025–May 2026
  • Designing custom motor inverters for Formula SAE with 5× efficiency and 4× precision improvements.
  • Improving EMI, reliability, safety, and performance.

Awards

  • MIT 6.191 Fastest CPU in Class History
  • Hackclub Undercity Winner
  • ISEF 2nd Award 2025 — $15k Chief of Naval Research Award
  • ISEF 3rd Award 2024 — Grand Award in Biomedical Engineering
  • MakeMIT 2nd Place — Entertainment Track
  • MIT Battlecode 2026 Finalist
  • CSEF First in Electronics (2024) · First in Computational Systems (2023)
  • Grand Prize — Best of Synopsys Championship (2024) · First Place (2023)
  • FRC Arizona East Regional Winner 2024
  • $1000 Medici Grant · PVSA Gold · picoCTF 2022 Top 2% · USACO Silver

Skills

Technical: ASIC Design · Verilog · Chisel · Yosys/Librelane · C++ · Python · Java · C# · Altium · Vivado · Bash · CAD · Wafer Testing · Probe Manipulation

Other: Tutoring (Algebra, Trigonometry, Java) · Team Management

Hobbies: Taekwondo — Fourth Degree Black Belt, 12+ years

Checkout my full list of projects here.

"I want to experience the whole world, to feel every high and every low, to live so fully that death itself is surprised to find me." — Anonymous